Staff Analog Design Engineer
SWIR Vision Systems
Design
Bengaluru, Karnataka, India
Posted on Feb 11, 2026
OnSemi is seeking a Staff Analog design Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including LED drivers, SiC/MOS/IGBT/motor/GAN drivers, Switches and efuses for consumer, industrial and automotive applications. In this role, you will focus on the following
- Design and develop an analog IP block from definition to IP delivery
- Design and simulation at the block/IP level during execution phase, present the block results to review team in timely manner.
- Work with and provide guidance to layout engg and monitors the progress of IP block layout
- Work with validation, product engineering and test engineering teams to enable them to measure Si performance
- Own technical outcomes of design, verification, implementation, and execution of power management IPs with complexities that can span from simple regulators to complex mixed-signal designs and control loops
- Able to plan and execute the work in timely manner aligning with full chip schedule.
#LI-RG1
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
More details about our company benefits can be found here:
| We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work. |
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Qualifications for Internal Candidates |
BS in Electrical Engineering or related 10 years of experience, or MS 8 and above years of experience
Qualification
- Solid track record of delivering block/IP level design
- Understand and execute IP design, simulations methods, boundary conditions, stress and reliability simulations, PVT/PMC/SOA simulations.
- Good communication skills to make detailed technical presentations
- Good understanding of various building blocks like LDOs, gate drivers, comparators, linear regulators, gm-stages, charge pumps etc
- Experience in SiC/GAN/LED/Motor, Efuse and smart Switches etc is plus
- Strong Analog IC design skills, debug of complex silicon problems using simulations and/or bench testing
- Understanding of power transistor Design, Layout, and Robustness
- Experience in system tools such as Simplis or MATLAB for architectural simulations, Cadence Spectre for schematic capture, simulation
- Strong verbal and written communication skills
- Ability to quickly ramp on new systems and processes
- Demonstrated strong interpersonal, analytical and problem-solving skills
- Ability to work in teams
#LI-RG1
- Design and develop an analog IP block from definition to IP delivery
- Design and simulation at the block/IP level during execution phase, present the block results to review team in timely manner.
- Work with and provide guidance to layout engg and monitors the progress of IP block layout
- Work with validation, product engineering and test engineering teams to enable them to measure Si performance
- Own technical outcomes of design, verification, implementation, and execution of power management IPs with complexities that can span from simple regulators to complex mixed-signal designs and control loops
- Able to plan and execute the work in timely manner aligning with full chip schedule.
#LI-RG1