Role Overview
The Senior IC Layout Manager leads IC layout delivery for the PMD product line, providing technical, people, and execution leadership across complex analog and mixed‑signal designs. This role is accountable for layout quality, schedule, and resource management from early floorplanning through tape‑out, working closely with Design Engineering, Design Enablement and Program Management.
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
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Required Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering or related field.
- 15+ years of IC layout experience with strong analog / mixed‑signal focus.
- Demonstrated leadership of layout teams or large layout programs.
- Deep understanding of PMIC layout challenges (high current, noise isolation, matching, reliability).
- Strong experience with industry‑standard layout and verification tools.
- Excellent communication and stakeholder management skills.
Preferred Qualifications
- Experience leading multi‑site or global layout teams.
- Prior ownership of full‑chip PMIC layouts in production.
- Experience across multiple foundries and technology nodes.
- Proven track record of driving layout automation or productivity improvements.
Key Responsibilities
- Lead IC layout execution for PMIC products from concept through tape‑out.
- Manage and mentor a team of layout engineers and project leads across sites.
- Own layout strategy, floorplanning, and full‑chip integration for analog/mixed‑signal designs.
- Ensure compliance with foundry design rules, reliability requirements, and layout best practices.
- Partner with cross‑functional teams to align layout plans with product roadmaps and schedules.
- Drive layout methodology, reuse, documentation, and automation initiatives.
- Track and communicate layout status, risks, and mitigation plans to stakeholders.
- Support continuous improvement through post‑silicon learning and process optimization.
What Success Looks Like
- On‑time, high‑quality delivery of PMIC layouts.
- Strong collaboration with design and product teams.
- High team engagement and technical growth.
- Measurable improvements in layout efficiency and quality.