Job Summary:
Digital IP Design Director
Location: Bangalore, India
Company: onsemi
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
Role Overview
onsemi is seeking a Digital IP Design Director to lead the development of digital datapath and subsystem IP for next-generation CMOS image sensors and the onsemi Treo platform. This role will manage a growing team of digital design and verification engineers, drive technical execution, and help shape the future of scalable, automotive‑grade digital IP.
The ideal candidate combines strong hands-on digital design expertise, people leadership, and a forward-looking mindset, including curiosity around how AI and automation can improve digital design productivity and cycle time.
#LI-RG1
onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.
We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.
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Required Qualifications
- 20+ years of overall experience in digital IC design and/or verification.
- 3+ years of proven people management or technical leadership experience.
- Strong background in digital IP or SoC development, from architecture through signoff.
- Experience working on Automotive IP or automotive semiconductor products.
- Hands-on experience with:
- RTL design (SystemVerilog / Verilog)
- Digital verification methodologies (UVM or equivalent)
- Low-power design techniques
- IP reuse and configurability
- Demonstrated ability to lead cross-functional technical efforts.
- Strong communication skills and the ability to influence across teams and geographies.
Preferred / Nice-to-Have Qualifications
- Experience with CMOS image sensor digital pipelines or imaging-related IP.
- Familiarity with platform or subsystem-level IP development.
- Exposure to functional safety concepts relevant to automotive products.
- Experience driving or adopting EDA automation, scripting, or AI-assisted workflows.
- Prior experience scaling or building a new team.
#LI-RG1
Key Responsibilities
Technical Leadership
- Lead the architecture, design, and delivery of digital datapath IP for CMOS image sensors, including high‑performance, low‑power pipelines.
- Drive development of core platform digital-on-top and subsystem IP for the onsemi Treo platform.
- Ensure IP meets automotive quality, safety, and reliability requirements (e.g., robustness, configurability, reuse).
- Partner closely with analog, mixed-signal, system, firmware, and software teams to deliver end-to-end solutions.
- Provide technical guidance on RTL quality, low-power design, clocking/reset strategies, and design-for-test.
Team & People Management
- Lead and mentor a team of digital IP designers and verification engineers.
- Own technical direction, staffing plans, performance management, and career development for the team.
- Actively grow and scale the team in Bangalore, including hiring, onboarding, and building a strong engineering culture.
- Foster collaboration, accountability, and continuous improvement across design and verification disciplines.
Execution & Program Ownership
- Own IP execution plans, schedules, and deliverables, ensuring predictable, high-quality releases.
- Drive alignment between IP roadmaps and product/platform needs.
- Ensure strong design/verification methodology, including coverage, regressions, and signoff criteria.
- Participate in technical reviews, risk assessment, and post-silicon learning.
Innovation & Productivity
- Stay curious and engaged with emerging trends, especially AI/ML-driven approaches to:
- RTL generation and review
- Verification acceleration
- Debug productivity
- Design-space exploration
- Champion adoption of tools and processes that reduce cycle time and improve first-time-right outcomes.
#LI-RG1