ENGR II, PRODUCT; PROD&TEST

SWIR Vision Systems
SWIR Vision Systems

Product

Bengaluru, Karnataka, India

Posted on Jul 30, 2026

Product and Test Engineering with >4 years experience on ATE (T2K, ETS364), HW design, TP development, debug, data analysis and presentation.

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onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits


We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.


Master's in Electronics and Communication with minimum 1-4yrs of direct experience of Test & DFT Design knowledge

  • Good programming skills using C/C++, Perl, Python
  • Excellent communication and leadership skills, working with cross-functional teams across multiple different internal development and factory sites
  • Excellent interpersonal skills – energetic, motivated, and self-driven
  • Demonstrate ability to work well within a global team environment with minimal supervision
  • Outstanding written and verbal communication skills
  • Strong organizational skills; demonstrate ability to manage multiple tasks

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  1. Define product DFT and test requirements Pre-PG including: a) DfT-max Requirements for a new product b) translate PRD / MRDs into PTS / SCMs / PRPs for ATE test-plan definition c) design ATE HW for lowest cost solution (max multi-site, lowest pin-mux) for Si bring-up and validation
  2. Post-Si bring-up and validation of all functional and test features. This includes extensive debug that will require good knowledge of IC design and semiconductor physics, with ability to clearly isolate and root-cause issues to design margins and/or sensitivies to wafer-fab process and parametric parameters.
  3. Execute design-of-experiments with process window corner lot to establish spec compliance of each product across full wafer-fab process window.
  4. Execute qualification cycles for Si and package to automotive, industrial, and commercial standards (as per the primary product market)
  5. During these various stages of Post-Silicon validation, you will interact with various cross-functional teams such as Design, DfT, Design Validation, Program Management, QRE/CQE, and Bench Characterization and Apps development teams
  6. Will actively own or be part of a team that owns ATE Test Solutions, including HW design, socket design, ATE Resource Allocation, Board Schematic, Layout, and Diagnostic code
  7. Will own product from bring-up to RTM (~12-14mo) and also own all the Product Entitlement goals and critical metrics for a successful ramp

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